The present invention relates to a display device for displaying an image on a screen, and a display control method and apparatus therefor.
In recent years, personal computers have been widely used not only in processing of scientific and technical data, but also in applications requiring a graphic display such as CAD, design, and the like. Accordingly, it has been required to improve the image quality and definition in the graphic display of a computer display. In order to meet such requirements, the following methods are available:
(1) to increase the display resolution; and PA1 (2) to increase the frame (field) frequency. By the former method (1), a high-definition image can be obtained, and by the latter method (2), an image display free from flickering is attained.
Furthermore, recent personal computers normally use displays capable of a display operation in an SVGA (Super Video Graphic Array) mode at a high resolution of 800.times.600, 1,024.times.768, or 1,280.times.1,024 in addition to a VGA (Video Graphic Array) mode at a resolution of 640.times.480, which was the standard mode before the advent of the SVGA mode. In addition, the frequency of a vertical synchronizing signal used in the display is increasing from 60 Hz to more than 70 Hz. In this manner, the display performance of a personal computer is improving to a level as high as that of a workstation.
On the other hand, as a display device, a flat panel display using, e.g., a liquid crystal has recently received a lot of attention. It is expected that such a flat panel display be used as a display monitor not only for lap-top computers and notebook computers but also for desktop computers due to its compact structure and very low radiation of electromagnetic waves in place of the CRT displays used so far.
As one of the flat panel displays, a display using a ferroelectric liquid crystal (FLC) (to be abbreviated as an FLCD hereinafter) is commercially available. Such an FLCD has a memory characteristic (i.e., a it maintains the ON/OFF states of liquid crystal pixels after an electric field required for turning on/off the pixels to be displayed is removed), and by utilizing this characteristic, a large-screen of flat panel display, which is very difficult to attain by conventional liquid crystal technology, can be realized. More specifically, by using a partial rewrite scanning mode for selectively scanning only lines of changed image data to be displayed, the screen can be efficiently refreshed. With this technique, even when the frequency for rewriting the entire frame (to be simply referred to as a frame frequency hereinafter for the sake of simplicity) decreases due to an increase in number of display lines upon construction of a large-screen/high-definition display, a sufficient response speed can be assured as the screen of the computer display.
With existing FLCD techniques, since each pixel to be displayed is set in either the ON or OFF state, a binary display is basically performed. For this reason, in order to obtain a larger number of display colors, one or a plurality of methods below must be independently-used or combined.
(1) Each pixel is divided into sub-pixels, and area gradation is attained by combining the sub-pixels.
(2) Digital halftone processing such as the "dither method", the "error diffusion method", or the like is performed to attain pseudo halftone expression.
Furthermore, in the case of a display which changes the display state in real time, high-speed processing is required in the sub-pixel driving operation or the digital halftone processing.
When a video signal supplied from a computer is displayed on the screen of an FLCD of high-definition, the display operation is realized as follows. That is, when the number of display pixels of the FLCD is equal to the number of pixels output from the computer, i.e., is 1,280.times.1,024, an image and synchronizing signal are received from the computer, and horizontal and vertical synchronizing signals are separated from the synchronizing signal. Using the separated horizontal synchronizing signal, a FLCD dot clock signal synchronized with the pixel clocks of the computer is reproduced, and the image signal is A/D (analog-to-digital) converted using the FLCD dot clock signal. The converted digital data is subjected to .gamma. characteristic adjustment and halftone processing. Thereafter, the digital image data is transferred to an output controller of the FLCD, thus displaying an image. In this case, the timings of the horizontal and vertical synchronizing signals and the dot clock signal synchronized with displaying pixels are peculiar to each computer. For this reason, using an FLCD interface board depending on the computer to be connected, image data from the computer can be displayed on the FLCD.
However, when an image signal from the computer is displayed on the FLCD by the above-mentioned method, the following problems are posed.
(1) Since there are some display modes such as VGA, SVGA, and the like, the FLCD dot clock signal used for A/D-converting image data must be reproduced in correspondence with each display mode. For this purpose, a plurality of display control circuits depending on the respective display modes are required, and disadvantages associated with cost and limitations in use are imposed on a user.
(2) When display operations in the respective display modes are performed on the FLCD as a bit-map display, if the VGA mode is selected, the number of pixels of a video signal in the VGA mode is 640.times.480, and hence, an image is displayed on only a portion about 1/4 of the 1,280.times.1,024 FLCD display. More specifically, the features of the large-screen, high-definition FLCD cannot be fully utilized.